114年-2-10-實作學生：電機工程學系【林庭葳】

參賽序號：2-10

海報主題

奈米片電晶體在極低電壓運作下之DIBL效應

系級

電機工程學系

指導老師及參賽學生

指導老師：涂維珍
參賽學生：林庭葳

構想說明

In this study, we investigate the drain-induced barrier lowering (DIBL) effect and of nanosheet field-effect transistors operating under ultra-low voltages. Through TCAD simulation, we can analyze the influence of DIBL on nanosheet devices, including subthreshold slope and the current ratio (Ion/Ioff) during low-voltage operation. The simulation result reveals that under the condition of aggressively voltage scaling, DIBL not only reduces the barrier height, but also exacerbates thermal carrier injection. It leads to increase the leakage current of off state and degraded current ratio. We also use TCAD to simulate the impact of DIBL, subthreshold swing and current ratio under different active doping concentration and different metal gate work function. When the active doping concentration increases from 1e17 cm-3 to 1e19 cm-3, the DIBL decreases by 46.93%, the subthreshold swing (SS) decreases by 49.31%, and the current on/off ratio increases by a factor of 23.306. Additionally, when the metal gate work function (WF) increases from 4.34 eV to 4.40 eV, the SS decreases by 1.82%, and the current on/off ratio increases by a factor of 4.33. This study provides critical insights into fundamental limitations of devices under ultra-low voltage conditions and expects to offer design strategies to mitigate the impact of DIBL in advance nanosheet transistors technologies.

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